Intel 最大的代工客戶、美國晶片商 Altera 日前宣佈他們將會生產一款名為 Stratix 10 的 SoC，而其最大的特點，就是包含有全球首款四核心 64 位元 Cortex-A53 CPU（iPhone 5s 用的是 Samsung 生產的雙核心 64 位元 A7 ARM 架構處理器）。據悉該產品將透過 Intel 最先進的 14nm 製程打造，主要用於網路設備，並不會與 Qualcomm 或 Samsung 的手機晶片構成競爭。
Stratix® 10 FPGAs and SoCs offer breakthrough advantages in bandwidth and system integration, including the next-generation hard processor system (HPS), to deliver the industry’s highest performance and most power- efficient FPGAs and SoCs. Stratix 10 devices are manufactured on the revolutionary Intel 14 nm 3D Tri-Gate transistor technology, which delivers breakthrough levels of performance and power efficiencies that were previously unimaginable. When coupled with 64 bit quad-core ARM® CortexTM-A53 processors and advanced heterogeneous development and debug tools such as the Altera® SDK for OpenCLTM and SoC Embedded Design Suite (EDS), Stratix 10 devices offer the industry’s most versatile heterogeneous computing platform. - See more at: http://www.altera.com/devices/fpga/stratix-fpgas/stratix10/stx10-index.jsp#sthash.tww2YECA.dpuf
White paper: The Breakthrough Advantage for FPGAs with Tri-Gate Technology pdf icon
Industry’s First Gigahertz FPGAs and SoCs
New ultra-high performance FPGA architecture
2x the core performance of prior generation high-end FPGAs
>10 TFLOPs of single-precision floating-point DSP performance
>4x processor data throughput of prior-generation SoCs
Break the Bandwidth Barrier with Unimaginable High-Speed Interface Rates
4x serial transceiver bandwidth from previous generation FPGAs for high port count designs
28 Gbps backplane capability for versatile data switching applications
56 Gbps chip-to-chip/module capability for leading edge interface standards
Over 2.5 Tbps bandwidth for serial memory with support for Hybrid Memory Cube
Over 1.3 Tbps bandwidth for parallel memory interfaces with support for DDR4 at 3200 Mbps
Lower Capital Expenditures (CapEx)
Largest monolithic FPGA device with >4M logic elements offer an unprecedented level of integration capability
Heterogeneous multi-die 3D solutions including SRAM, DRAM, and ASICs
Next-generation HPS
Lower Operating Expenses (OpEX)
Leveraging Intel's leadership in process technology, Stratix 10 FPGAs offer the most power-efficient technologies
70% lower power than prior generation high-end FPGAs and SoCs
100 GFlops/Watt of single-pecision floating point efficiency
Integrated host processor for operation, administration, and maintenance minimizes system down time
Versatile Heterogeneous Computing for Performance and Power-Efficient SoC Design
64 bit quad-core ARM Cortex-A53 processor optimized for ultra-high performance per watt
Heterogeneous C-based modeling and hardware design with Altera SDK for OpenCL
Heterogeneous debug, profiling, and whole chip visualization with Altera SoC EDS featuring ARM Development Suite™ (DS-5™) Altera Edition Toolkit
Reduce Time-to-Market
Fastest compile times in the industry
C-based design entry using the Altera SDK for OpenCL, offering a design environment that is easy to implement on FPGAs
Start developing with Arria 10 devices and then migrate to footprint-compatible Stratix 10 devices
Complementary Enpirion PowerSoCs will offer customers higher performance, lower system power, higher reliability, smaller footprint, and faster time-to-market to power Stratix 10 FPGAs and SoCs
Altera to Build Next-Generation, High-Performance FPGAs on Intel's 14 nm Tri-Gate Technology
White paper: The Breakthrough Advantage for FPGAs with Tri-Gate Technology - See more at: http://www.altera.com/devices/fpga/stratix-fpgas/stratix10/stx10-index.jsp#sthash.tww2YECA.dpuf
Source:http://www.altera.com/devices/fpga/stratix-fpgas/stratix10/stx10-index.jsp
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