真乄科技業的頂尖投資團隊

New generations of processors require more efficient interface formats that will enable greater memory bandwidth. In addition todays thinner notebook PCs are changing the memory package density requirements for portable electronics. Traditional SO DIMM is considered too big and bulky for these slimmed down lap tops
Certainly 3DIC memory stacks using TSV technology would meet the memory bandwidth and miniaturization requirements, but as of yet they are too costly to put into such consumer devices. 
Due to the center positioned wire-bond sites on the high performance SDRAM, the traditional method of die stacking and wire-bond assembly is especially difficult and electrical performance is often compromised due to the unequal length of the WB in structures such as those shown below. The 2 chip face up and 4 chip solutions also require RDL of the interconnection pads to the periphery in order to WB. In addition, even though the die can be thinned, WB loop height adds to the height occupied by the stack. 

 

Based on all of these requirements Invensas has developed the dual face down (DFD) and Quad Face Down (QFD) packages shown below. The substrate is BT and the metallization is Cu/Ni/Au. These packages have reportedly passed standard reliability testing.

 
Invensas DFD and QFD memory packages

Slots in the package allow for much more uniform WB lengths. All WB is done at the same time after chips are attached.  After WB and molding, solder balls are attached to produce a BGA format on 0.8mm pitch.

 
WB Connections in the QFD package

The QFD requires far less area than a 4 chip SO DIMM.

 
QFD vs 4 Chip SO DIMM