Chou University builds hybrid NAND-ReRAM unit that

A Japanese research group developed a hybrid SSD architecture using ReRAM (resistive random-access memory), which realizes high speed data rewriting, and a high capacity NAND flash memory.

The group is led by Ken Takeuchi, professor at the Department of Electrical, Electronic and Communication Engineering, the Faculty of Science and Engineering, Chuo University.

Compared with existing SSDs using only NAND flash memory, it can realize an 11 times higher data writing performance, 93% lower power consumption and 6.9 times longer product life, the group said. The new architecture will be announced at the 2012 Symposium on VLSI Circuits, which runs from June 13 to 15, 2012, in Hawaii, the US (lecture number: C-16.3).

In the case of NAND flash memory, the minimum unit used for writing data (page) is as large as 16 Kbytes, and it is not possible to overwrite data on the same page. Therefore, for a random access that overwrites 512 bytes (1 sector) of data, it is necessary to write 16 Kbytes of data in a different area and delete the original data later. When SSDs are used for servers at financial institutions, data writing performance lowers and power consumption increases because such a random access is dominant.

This time, the research group proposed a hybrid SSD that combines a 256-Gbyte NAND flash memory and about 8 Gbits of ReRAM used as both cache and storage memories. Because ReRAM enables a high-speed random access, it is possible not only to improve SSD performance and lower power consumption but also to drastically increase product life by using ReRAM for rewriting small data.

Specifically, data writing is controlled by using the following three algorithms. First, the AF (anti-fragment) algorithm writes small data in units of sectors in the ReRAM. Once about one page of data is stocked, it is written in the NAND flash memory. As a result, the frequency of random access to the NAND flash memory can be reduced. However, because the capacity of the ReRAM is limited, smaller data such as data that uses 60% of a page is sometimes written to the NAND flash memory, depending on the ReRAM's free space.

Second, to overwrite a small amount of data in the NAND flash memory after writing a page of data in it, the "RAAF (reconsider as a fragmentation)" algorithm transfers the page of data to the ReRAM again so that data is not fragmented in the NAND flash memory.

Third, the MRU (most recently used table) algorithm stores frequently accessed data in the ReRAM. It records a certain amount of the latest addresses that were used for writing data and sent by the host so that data having those addresses is written in the ReRAM. This is based on the assumption that the addresses of frequently accessed data is stored in the latest records.

When the research group prototyped a controller to carry out those controls and tested it on an emulator, it confirmed that SSD's data writing performance, power consumption and product life can be improved by 11 times, reduced by 93% and increased by 6.9 times, respectively. The group assumed that each of the controller, ReRAM and NAND flash memory were three-dimensionally connected by TSV (through silicon via). But is possible to achieve almost the same results without using TSV, it said.

As input data, the group used access data of financial servers, for which random access is dominant. And, to use the hybrid SSD architecture for different applications, it is necessary to change the algorithms, the group said.

Among the improvements announced this time, the about seven times longer life of NAND flash memory has the largest impact. At data centers, etc, SSDs have to be replaced periodically. Therefore, the longer life of NAND flash memory can reduce costs to 1/7. Even though ReRAM, which is currently expensive, is used, "It pays off enough," Takeuchi said.

Furthermore, the performance and reliability required for the ReRAM became clear. For the new hybrid SSD, the research group reduced the frequency of writing data in the NAND flash memory and decided to make heavy use of the ReRAM.

As a result, data is written in the ReRAM about 30 times more frequently than in the NAND flash memory. If data is rewritten in the NAND flash memory 3,000 times, data is rewritten in the ReRAM about 100,000 times (105 times). As for the reading and writing speeds required for the application, about several microseconds is enough.

Those values required for the ReRAM are much lower than expected. To use ReRAM as a storage-class memory such as for the new hybrid SSD, it is better to scale down manufacturing processes for increasing capacity and lowering costs than to develop technologies for improving reliability and speed, Takeuchi said.

資料來源:http://techon.nikkeibp.co.jp/english/NEWS_EN/20120614/223032/?P=2

arrow
arrow
    全站熱搜

    Shacho San 發表在 痞客邦 留言(0) 人氣()